Electronics is 7-11 questions on the FE Electrical exam, the third-largest electrical area after Circuit Analysis and Power Systems. It covers discrete devices, amplifiers, operational amplifiers, instrumentation and power electronics.

The device questions are model questions: pick the right operating region, write the model, solve the resulting linear circuit. The op-amp questions are even more mechanical, provided the virtual-short rule is applied correctly.

Exam weight: NCEES lists Electronics at 7-11 questions (6-10%) of the 110-question FE Electrical and Computer exam. Work each problem below on paper first, then reveal the worked solution — reading a solution you have not attempted builds recognition, not recall.

What NCEES Tests in Electronics

The specification lists models, biasing, and performance of discrete devices (diodes, transistors, thyristors), amplifiers (single-stage/common emitter, differential, biasing), operational amplifiers (ideal, nonideal), instrumentation (measurements, data acquisition, transducers) and power electronics (rectifiers, inverters, converters).

The specification lists models, biasing and performance of discrete devices (diodes, transistors, thyristors), amplifiers (single-stage common emitter, differential, biasing), operational amplifiers (ideal and nonideal), instrumentation (measurements, data acquisition, transducers) and power electronics (rectifiers, inverters, converters).

Expect a diode circuit with the constant-drop model, a BJT bias point and a check for saturation, a MOSFET drain current in saturation, the gain of an inverting or non-inverting op-amp, a differential amplifier gain or common-mode rejection ratio, an RTD or strain-gauge reading, the average output of a rectifier and the output voltage of a buck or boost converter.

5 Free Electronics Practice Problems

Each problem below comes from the PECivilClick FE Electrical question bank, with a worked solution that cites its FE Reference Handbook page, and matches the style, difficulty and format of the real exam. Attempt each one under a three-minute limit — roughly the pace the exam demands.

Problem 1 — A. Models, biasing, and performance of discrete devices (diodes, transistors, thyristors)

Which of the following describes the junction bias conditions of a BJT operating in the forward-active region?

Answer: C) Base-emitter forward biased and base-collector reverse biased

The BJT table on p. 387 of the Handbook lists the three regions by the bias of the two junctions. Active region: base emitter junction forward biased and base collector junction reverse biased. Saturation region: both junctions forward biased. Cutoff region: both junctions reverse biased.

Physically, the forward-biased base-emitter junction injects carriers from the heavily doped emitter into the thin base, and the reverse-biased base-collector junction sweeps almost all of them into the collector before they can recombine. That is what makes \(i_C = \beta i_B\) and \(i_C = \alpha i_E\) hold, with \(\alpha = \beta/(\beta + 1)\) close to one, and it is the only region in which the transistor behaves as a controlled current source and can amplify. For an NPN device the conditions read \(V_{BE} \approx 0.7\) V and \(V_{CB} > 0\), i.e. \(V_{CE}\) above roughly 0.2 V; for a PNP the polarities reverse.

Both junctions forward biased is saturation: the collector also injects carriers, \(V_{CE}\) collapses to about 0.2 V and \(i_C\) falls below \(\beta i_B\); this is the on state of a switch, not an amplifier.

Neither junction forward biased means both reverse biased, which is cutoff: no injection, \(i_C \approx 0\), the off state of a switch.

Base-emitter reverse and base-collector forward biased is the reverse-active mode, the transistor run backwards; it conducts, but with a very small current gain because the collector is lightly doped and makes a poor emitter, so it is not used for amplification.

Problem 2 — B. Amplifiers (single-stage/common emitter, differential, biasing)

A common-emitter BJT amplifier has its emitter at ac ground. In terms of the small-signal parameters, what is the resistance seen looking into the base? Assume \(r_o\) is very large.

Answer: A) \(\beta/g_m\)

In the low-frequency small-signal model on p. 387 of the Handbook the base and emitter are joined by \(r_\pi\), and the controlled source \(g_m v_{be}\) sits between collector and emitter. With the emitter grounded, a test voltage at the base sees only \(r_\pi\), so the input resistance is

$$R_{in} = r_\pi \approx \dfrac{\beta}{g_m} = \dfrac{\beta V_T}{I_{CQ}}$$

using the Handbook's \(g_m \approx I_{CQ}/V_T\). The same result comes from currents: \(i_b = i_c/\beta = g_m v_{be}/\beta\), so \(v_{be}/i_b = \beta/g_m\). At \(I_C = 1\) mA and \(\beta = 100\) this is \(100 \times 0.026/0.001 = 2.6\) kΩ, the moderate input resistance that characterises the common-emitter stage; it rises with \(\beta\) and falls as the bias current increases. The collector resistor does not enter because, with \(r_o\) very large, nothing connects the collector node back to the base.

\(1/g_m\) is the resistance seen looking into the emitter, the low input resistance of the common-base stage, smaller than \(r_\pi\) by the factor \(\beta\).

\(\beta R_C\) multiplies the current gain by the load, which has the units of a resistance but corresponds to no node of the model.

\(R_C \| r_o\) is the resistance seen looking into the collector, the output resistance of the stage, not its input resistance.

Problem 3 — C. Operational amplifiers (ideal, nonideal)

An op-amp difference amplifier has \(R_1 = 10\) kΩ from \(V_1\) to the inverting input, \(R_2 = 50\) kΩ from the inverting input to the output, \(R_3 = 10\) kΩ from \(V_2\) to the non-inverting input and \(R_4 = 50\) kΩ from the non-inverting input to ground. With \(V_1 = 3\) V and \(V_2 = 5\) V, what is the output voltage?

Answer: A) 10 V

This is the Handbook's two-source configuration on p. 382, \(v_0 = -(R_2/R_1)v_a + (1 + R_2/R_1)v_b\), where \(v_a = V_1\) and \(v_b\) is the voltage at the non-inverting terminal. Since the ideal op amp draws no input current, \(R_3\) and \(R_4\) form a plain divider:

$$v_b = V_2\dfrac{R_4}{R_3 + R_4} = 5 \times \dfrac{50}{60} = 4.167\text{ V}$$

$$v_0 = -\dfrac{50}{10}(3) + \left(1 + \dfrac{50}{10}\right)(4.167) = -15 + 25 = 10\text{ V}$$

Because the ratios match, \(R_2/R_1 = R_4/R_3 = 5\), the two terms combine into the difference form \(v_0 = (R_2/R_1)(V_2 - V_1) = 5(5 - 3) = 10\) V, and the common part of the inputs cancels exactly: 3 V and 5 V give the same output as 103 V and 105 V would, which is what the circuit is for. A mismatch in the ratios lets a fraction of the common-mode voltage through, and the CMRR of the finished amplifier is then set by resistor tolerance rather than by the op amp.

25 V is the non-inverting term alone, \((1 + R_2/R_1)v_b\), with the contribution of \(V_1\) through \(R_1\) omitted.

12 V applies the non-inverting gain of 6 to the difference, \(6(5 - 3)\); the difference is multiplied by \(R_2/R_1\), not by \(1 + R_2/R_1\).

40 V multiplies the sum of the inputs, \(5(5 + 3)\), instead of their difference.

Problem 4 — D. Instrumentation (measurements, data acquisition, transducers)

A signal to be digitized contains frequency components up to 22 kHz. According to the sampling theorem, what is the theoretical minimum sampling rate (the Nyquist rate) that allows the signal to be reconstructed?

Answer: C) 44 kHz

The Handbook's statement of Nyquist's (Shannon's) sampling theorem on p. 224 is that the sample rate must be larger than twice the highest frequency contained in the measured signal, \(f_s > 2f_N\) with \(f_N\) that highest frequency:

$$2f_{max} = 2 \times 22\text{ kHz} = 44\text{ kHz}$$

So 44 kHz is the Nyquist rate, the limiting value that the sampling frequency must exceed. Each cycle of the highest component must be sampled more than twice, otherwise the sequence of samples could equally have come from a lower frequency; the Handbook calls the impostors alias frequencies. In practice the rate is set somewhat above the limit and an anti-aliasing low-pass filter removes whatever lies above \(f_s/2\) before sampling, since a real signal is not band-limited exactly at 22 kHz. Compact-disc audio, sampled at 44.1 kHz, is this very calculation with a margin of 0.1 kHz for the filter's transition band.

22 kHz samples at the signal's own highest frequency, one sample per cycle, which cannot distinguish that component from dc.

11 kHz halves instead of doubling; it is the highest frequency that a 22 kHz sampler could capture, the relation read backwards.

88 kHz is twice the Nyquist rate, a comfortable choice but not the theoretical minimum asked for.

Problem 5 — E. Power electronics (rectifiers, inverters, converters)

An ideal boost (step-up) dc-dc converter must produce \(V_{out} = 48\) V from \(V_{in} = 12\) V. What duty ratio is required?

Answer: C) 0.75

The Handbook's Power Conversion section on p. 385 gives the voltage gain of an ideal boost converter as \(1/(1 - D)\), with \(D\) the duty ratio, the fraction of the switching period during which the switch is on.

$$\dfrac{V_{out}}{V_{in}} = \dfrac{1}{1 - D} \quad\Rightarrow\quad 1 - D = \dfrac{V_{in}}{V_{out}} = \dfrac{12}{48} = 0.25$$

$$D = 1 - 0.25 = 0.75$$

Check: \(12/(1 - 0.75) = 12/0.25 = 48\) V. The switch is closed for 75% of each period, during which the inductor charges from the 12 V source, and open for 25%, during which the inductor releases its stored energy in series with the source into the 48 V output. Volt-second balance on the inductor, \(V_{in}DT = (V_{out} - V_{in})(1 - D)T\), is where the gain formula comes from and gives the same 0.75 directly. A gain of 4 is near the practical limit of a boost stage: as \(D \to 1\) the ideal gain grows without bound but conduction losses in the switch and inductor take over.

0.25 is \(1 - D\), the off-time fraction, reported as the duty ratio.

0.80 comes from the buck-boost gain \(D/(1 - D) = 4\); that topology inverts the output and is not a boost converter.

0.20 is \(V_{in}/(V_{in} + V_{out})\), the complement of the buck-boost answer.

Using the FE Reference Handbook for Electronics

The Handbook covers operational amplifiers and the common-mode rejection ratio on p. 382, solid-state devices on p. 383, the differential amplifier on p. 384, power conversion on p. 385, diodes and the thyristor on p. 386, the bipolar junction transistor on p. 387 and the enhancement MOSFET on p. 389. Sensors and data acquisition are in the instrumentation chapter: RTDs on p. 219, thermocouples on p. 220, strain transducers on p. 221 and sampling and analog-to-digital conversion on p. 224. Slew rate, gain-bandwidth product and converter formulas are not tabulated.

Four Mistakes That Cost Points

Frequently Asked Questions

How many electronics questions are on the FE Electrical exam?

NCEES specifies 7-11 questions out of 110, roughly 6 to 10 percent, the third-largest electrical knowledge area.

Which transistor models are expected?

The constant-drop diode model, the beta model of the BJT with the active and saturation regions, and the square-law model of the MOSFET in saturation. Small-signal parameters such as transconductance appear in amplifier gain questions.

How are op-amp questions posed?

Almost always with the ideal model: no input current and equal input voltages under negative feedback. Inverting, non-inverting, summing, difference and integrator configurations cover nearly every question.

What instrumentation content is tested?

RTD resistance versus temperature, thermocouple output, strain-gauge factor and bridge output, and analog-to-digital converter resolution and sampling. Each has a formula in the instrumentation chapter of the Handbook.

Keep Going

These topics feed into each other on the exam:

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