Properties of Electrical Materials is 4-6 questions on the FE Electrical exam, split between semiconductor physics, the electrical and magnetic properties of bulk materials, and thermal behavior. It is short, and the questions are direct.

Most items are a definition or a one-line calculation: carrier concentration from doping, conductivity from mobility, resistance from resistivity and temperature, capacitance from permittivity, or thermal expansion from a coefficient.

Exam weight: NCEES lists Properties of Electrical Materials at 4-6 questions (4-5%) of the 110-question FE Electrical and Computer exam. Work each problem below on paper first, then reveal the worked solution — reading a solution you have not attempted builds recognition, not recall.

What NCEES Tests in Electrical Materials

The specification lists semiconductor materials (tunneling, diffusion/drift current, energy bands, doping bands, p-n theory), electrical properties (conductivity, resistivity, permittivity, magnetic permeability, noise) and thermal properties (conductivity, expansion).

The specification names semiconductor materials (tunneling, diffusion and drift current, energy bands, doping bands, p-n theory), electrical properties (conductivity, resistivity, permittivity, magnetic permeability, noise) and thermal properties (conductivity, expansion).

Expect to identify n-type and p-type dopants, compute the minority-carrier density from the mass-action law, distinguish drift from diffusion current, explain what happens to the depletion region under bias, apply the temperature coefficient of resistance, and estimate thermal noise or thermal expansion.

5 Free Electrical Materials Practice Problems

Each problem below comes from the PECivilClick FE Electrical question bank, with a worked solution that cites its FE Reference Handbook page, and matches the style, difficulty and format of the real exam. Attempt each one under a three-minute limit — roughly the pace the exam demands.

Problem 1 — A. Semiconductor materials (e.g., tunneling, diffusion/drift current, energy bands, doping bands, p-n theory)

A crystalline material has an energy band gap of 1.12 eV at room temperature. How is the material best classified?

Answer: B) A semiconductor

The band gap is the energy separating the filled valence band from the empty conduction band, the energy an electron must gain to become free to carry current. In a conductor the two bands overlap or the conduction band is partly filled, so there is no gap and electrons move at any temperature. In an insulator the gap is several electronvolts, diamond's 5.5 eV for instance, far more than the thermal energy \(kT = 0.026\) eV at 300 K can supply, so almost no electrons cross it and the conductivity is negligible. A semiconductor lies between, with a gap of the order of one electronvolt: at room temperature a small but useful population is excited across it, giving silicon its intrinsic concentration \(n_i = 1.5 \times 10^{10}\) cm\(^{-3}\), and the conductivity can then be set over many orders of magnitude by doping, which the Handbook's table on p. 120 lists for silicon, germanium and gallium arsenide with dopant levels a few hundredths of an electronvolt from the band edges.

A gap of 1.12 eV is silicon's own value at 300 K, and germanium's 0.66 eV and gallium arsenide's 1.42 eV bracket it; the material is a semiconductor. Its conductivity rises steeply with temperature, the opposite of a metal, because the number of carriers grows as \(e^{-E_g/2kT}\).

An insulator would have a gap several times larger, with no measurable intrinsic conduction at room temperature.

A conductor has no band gap at all.

A superconductor is a state some conductors enter below a critical temperature, not a band-gap classification; a 1.12 eV gap rules out metallic conduction in the first place.

Problem 2 — B. Electrical (e.g., conductivity, resistivity, permittivity, magnetic permeability, noise)

Copper at room temperature has a conductivity \(\sigma = 5.96 \times 10^{7}\) S/m. What is its resistivity?

Answer: A) \(1.68 \times 10^{-8}\) Ω·m

The Handbook states on p. 117 that conductivity is the reciprocal of the resistivity:

$$\rho = \dfrac{1}{\sigma} = \dfrac{1}{5.96 \times 10^{7}\text{ S/m}} = 1.68 \times 10^{-8}\text{ Ω·m}$$

The unit follows because a siemens is an inverse ohm, so S/m inverts to Ω·m. This is copper's standard value at 20 °C, and the Handbook's table of metals on p. 119 lists \(1.55 \times 10^{-8}\) Ω·m at 0 °C, the difference being the 0.4% per °C rise of a metal's resistivity with temperature; only silver, at \(1.47 \times 10^{-8}\) Ω·m, conducts better. The number becomes a resistance through \(R = \rho L/A\): one metre of 1 mm\(^2\) copper wire has \(R = 1.68 \times 10^{-8} \times 1/10^{-6} = 0.017\) Ω, the figure behind wiring tables. In the mixed units of semiconductor work the same resistivity is \(1.68 \times 10^{-6}\) Ω·cm, since an ohm-metre is a hundred ohm-centimetres.

\(1.68 \times 10^{-6}\) Ω·m is the value in Ω·cm labelled as Ω·m.

\(5.96 \times 10^{7}\) Ω·m is the conductivity itself, not inverted.

\(1.68 \times 10^{8}\) Ω·m has the mantissa of the reciprocal but the exponent's sign lost.

Problem 3 — C. Thermal (e.g., conductivity, expansion)

A transistor has a maximum junction temperature \(T_{J,max} = 175\) °C and a junction-to-ambient thermal resistance \(R_{\theta JA} = 50\) °C/W, so that \(T_J = T_A + P\,R_{\theta JA}\). With the ambient at \(T_A = 45\) °C, what is the maximum power the device may dissipate?

Answer: B) 2.6 W

The relation is the thermal analogue of Ohm's law: the dissipated power flows as heat from junction to ambient through a thermal resistance, and the temperature difference it produces is \(P\,R_{\theta JA}\), just as the Handbook's conduction resistance on p. 204 relates a heat flow to a temperature drop. Solving for the power at the temperature limit,

$$P_{max} = \dfrac{T_{J,max} - T_A}{R_{\theta JA}} = \dfrac{175 - 45}{50} = \dfrac{130}{50} = 2.6\text{ W}$$

Every watt above this raises the junction 50 °C further and takes it past the rating, where leakage, threshold shifts and eventually thermal runaway end the device. The rating is set by the material: silicon junctions are limited to 150 to 175 °C because \(n_i\) doubles every 11 °C and the lightly doped regions turn intrinsic. The number also shows the design levers: a cooler ambient buys \(1/50\) W per degree, and a heat sink that lowers \(R_{\theta JA}\) to 10 °C/W would allow 13 W, which is why the same die is sold at very different power ratings depending on its package and mounting.

3.5 W is \(T_{J,max}/R_{\theta JA}\), the ambient temperature ignored.

0.9 W is \(T_A/R_{\theta JA}\), the ambient used in place of the available rise.

4.4 W adds the two temperatures instead of subtracting.

Problem 4 — A. Semiconductor materials (e.g., tunneling, diffusion/drift current, energy bands, doping bands, p-n theory)

Intrinsic silicon at 300 K has an intrinsic carrier concentration \(n_i = 1.5 \times 10^{10}\) cm\(^{-3}\). What is the relationship between the electron concentration \(n\) and the hole concentration \(p\) in this material?

Answer: D) \(n = p = n_i = 1.5 \times 10^{10}\text{ cm}^{-3}\)

In an intrinsic, undoped semiconductor every free electron in the conduction band was excited out of the valence band and left one hole behind, so electrons and holes are created and destroyed in pairs and their concentrations are equal. The Handbook's equilibrium relation on p. 383, \((p)(n) = n_i^2\), then fixes the common value:

$$n = p \quad\text{and}\quad np = n_i^2 \quad\Rightarrow\quad n = p = n_i = 1.5 \times 10^{10}\text{ cm}^{-3}$$

That is the definition of \(n_i\): the concentration of each carrier type in the pure crystal. The product relation is the one that survives doping. Adding donors raises \(n\) and, through \(np = n_i^2\), depresses \(p\) by the same factor, so the equality \(n = p\) is the special case of no net doping while the product \(n_i^2\) holds for any doping at a given temperature. Both are small numbers for silicon: \(1.5 \times 10^{10}\) carriers per cubic centimetre against \(5 \times 10^{22}\) atoms, one carrier per three trillion atoms, which is why intrinsic silicon is a poor conductor and why a dopant at one part per million transforms it.

\(n \cdot p = n_i\) misstates the mass-action law, whose right-hand side is \(n_i^2\); the product of two concentrations has the units of a concentration squared.

\(n + p = n_i\) would give each carrier half of \(n_i\), contradicting the definition of \(n_i\) as the concentration of each.

\(n = 2p\) would require a net charge, since ionised dopants are absent; charge neutrality in the intrinsic crystal forces \(n = p\).

Problem 5 — A. Semiconductor materials (e.g., tunneling, diffusion/drift current, energy bands, doping bands, p-n theory)

A silicon p-n junction has \(N_A = 10^{17}\) cm\(^{-3}\) on the p side and \(N_D = 10^{15}\) cm\(^{-3}\) on the n side. With \(n_i = 1.5 \times 10^{10}\) cm\(^{-3}\) and \(V_T = 26\) mV at 300 K, what is the built-in potential?

Answer: C) 0.70 V

The Handbook gives the built-in (contact) potential of a p-n junction on p. 383 as \(V_0 = (kT/q)\ln(N_aN_d/n_i^2)\):

$$\dfrac{N_AN_D}{n_i^2} = \dfrac{(10^{17})(10^{15})}{(1.5 \times 10^{10})^2} = \dfrac{10^{32}}{2.25 \times 10^{20}} = 4.44 \times 10^{11}$$

$$\ln(4.44 \times 10^{11}) = \ln 4.44 + 11\ln 10 = 1.49 + 25.33 = 26.82$$

$$V_0 = (0.026)(26.82) = 0.697 \approx 0.70\text{ V}$$

The potential is the sum of the two Fermi-level offsets, \(V_T\ln(N_A/n_i) = 0.41\) V on the p side and \(V_T\ln(N_D/n_i) = 0.29\) V on the n side, each measuring how far its doping has pushed the carrier balance from intrinsic. It is the barrier an electron in the n region must climb to reach the p region at equilibrium, and it is what a forward bias reduces; the diode's familiar 0.6 to 0.7 V turn-on voltage is this quantity less the small drop that lets a useful current flow. Because it depends on the logarithm of the dopings, changing \(N_D\) by a factor of ten moves it by only \(0.026\ln 10 = 60\) mV.

0.41 V is the p-side term \(V_T\ln(N_A/n_i)\) alone, the n side forgotten.

0.30 V uses the base-10 logarithm, \(0.026\log_{10}(4.44 \times 10^{11}) = 0.026 \times 11.65\).

1.12 V is the silicon band gap in volts, the upper limit that \(V_0\) approaches only for degenerate doping on both sides.

Using the FE Reference Handbook for Electrical Materials

The Handbook covers semiconductors with the dopant table on p. 120 and the properties of materials on p. 117, resistivity and the magnetic-field relations on p. 357 with the temperature dependence of resistance on p. 358, capacitors and inductors on p. 359, thermal deformation on p. 130 and thermal resistance on p. 204. The Einstein relation, diffusion length, depletion width and the noise formulas are not in the Handbook, so exam questions that need them supply the formula in the stem.

Four Mistakes That Cost Points

Frequently Asked Questions

How many materials questions are on the FE Electrical exam?

NCEES specifies 4-6 questions out of 110, about 4 to 5 percent, covering semiconductor, electrical and thermal properties.

What semiconductor physics is expected?

Energy bands and the band gap, intrinsic and doped carrier densities, drift and diffusion currents, the built-in potential and depletion region of a p-n junction, and the direction of forward and reverse bias. Device-level circuit questions belong to the Electronics area.

Which formulas are not in the Handbook?

The Einstein relation, the diffusion length, the depletion width, the thermal and shot noise expressions and skin depth. When a question needs one of these it gives the formula in the stem.

Why are thermal properties in an electrical exam?

Because heat removal limits every power device: thermal resistance sets the junction temperature, thermal expansion mismatch stresses solder joints, and thermal conductivity decides the heat sink.

Keep Going

These topics feed into each other on the exam:

Done with electrical materials? Browse every knowledge area from the free FE Electrical practice problem hub, see what the full bank covers on the FE Electrical exam prep page, or plan your schedule with the FE study timeline.